Lithography is one of the most important techniques utilized in semiconductor manufacturing, and is particularly used to define patterns, as for example those employed in a wiring layer patterning process, a device width defining process, or a doped-region defining process. A lithography process generally includes an exposure step and a development step, wherein the exposure step utilizes a light source to irradiate a photoresist layer directly or through a photo mask to induce chemical reactions in exposed portions. The development step is conducted to remove the exposed portion in positive resist (or the unexposed portion in negative resist) and form photoresist patterns, thus completing the transfer of photo mask patterns or virtual patterns to the resist material.
The need to produce integrated circuits of greater complexity and performance has driven designers to shrink the size of minimum features in the horizontal plane. Avoidance of excessive current density, however, has meant that the horizontal scaling has not necessarily been accompanied by a reduction in the vertical dimension. This has resulted in increase of the ratio of feature height to feature width, something generally referred to as aspect ratio. The increased aspect ratio has resulted in problems with the use of conventional single-layer resists in integrated circuitry fabrication.
With lithography pushing to the theoretical limits of resolution the use of double or multiple exposures is beginning to play a more important role. Techniques such as dipole decomposition can allow the lithographer to print features that would not be possible with a single exposure. However, dipole decomposition also has certain limitations. Overlapping dipole decompositions placed within a single resist, limit the pitch and/or resolution of the printed image for certain applications such as contacts. Many of these multiple exposure techniques require an intermediate etch step into a hard mask material. However, the hard mask materials can have integration issues because they can interact with the substrate underneath. In addition, because the hard mask is deposited directly on the substrate, the intermediate etches can cause damage to the substrate itself. Opening the hard mask can also expose the substrate to chemicals and/or materials that adversely affect the substrate. The additional hard mask open step increase costs and throughput.
Accordingly, it would be desirable to be able to enhance the resolution of lithographically patterned features in a manner that does not adversely affect the substrate. It is also desirable to enhance the resolution with as simple and low cost of a technique as possible.
The extension of 193 nm optical lithography to numerical aperture (NA) values above 1.0, enabled by immersion optical projection systems, provides a means of achieving decreased resolution for a printable minimum feature size, and therefore allows for further scaling of integrated circuits (IC) by the semiconductor industry. However, the limits of water immersion are at an NA of ˜1.35. To continue resolution scaling beyond an NA of 1.35, double patterning is a technique that does not require new lithographic tools. (S. Brueck “There are No Fundamental Limits to Optical Lithography”, Int. Trends in Applied Optics, edited by A. Guenther, pp. 85-110, SPIE Press (2002).) Typically, the resolution limit of a lithographic process is defined by the Rayleigh criterion: R=k □/NA, where R is the smallest possible resolution, □ is the wavelength of light used, NA is the numerical aperture of the imaging lens, and k is a scaling factor that represents the aggressiveness of the lithographic process. Using a conventional, single exposure lithography process, k=0.25 is the limit for resolution scaling, although k˜0.35 is a more practical limit for single exposure lithography (H. Levinson, Principles of Lithography, 2nd ed, SPIE Press (2005)).
Double or multiple patterning, however, is traditionally an expensive and low throughput methodology for achieving improved resolution, and effectively reducing the k factor. Typical double patterning techniques require a lithography imaging step, followed by a dry reactive ion etch (RIE) step, followed by a second lithography step, and yet a second RIE step as in FIG. 1(a). Many innovative double exposure techniques have the common goal of reducing the number of intermediate steps required to achieve two independent exposures for a single patterning film stack, as shown in FIG. 1(b). The prior art in this field, however, has significant disadvantages addressed by the imaging scheme presented by this invention.
A summary of the general imaging scheme of the present invention is shown in FIG. 2. First, conventional lithography is performed utilizing an appropriate film stack to be patterned, preferably coated with an appropriate optical antireflective coating, and finally coated with a conventional photoresist. The photoresist is imaged using conventional optical lithography processes known in the art. An immersion topcoat and/or top antireflective coating can also be utilized if necessary. Then the post-litho photoresist image is overcoated with a planarizing, etch selective polymeric coating. This planarizing overcoat optionally can be an antireflective coating as well. This layer serves to eliminate the topography issues embedded in many of the double patterning techniques (Owe-Yang, D. C., et al., “Double exposure for the contact layer of the 65 nm node,” Proceedings of SPIE, Vol. 5753, p. 171, 2005) This overcoat must not dissolve the underlying developed resist film. This can be accomplished by several mechanisms such as solvent immiscibility, or resist crosslinking. Next, a second photoresist is coated and imaged on top of the etch selective coating, utilizing conventional lithographic imaging. With the second photoresist coating, a bottom or top antireflective coating, an adhesion layer, and/or immersion protective topcoat may also be utilized if necessary. Finally, an integrated reactive ion etch is performed in which both the second and first lithographic images are transferred into the underlying film stack. It's possible to utilize several embodiments of this scheme to achieve a wide array of double exposure schemes.
The invention presented in FIG. 2 is not confined to optical lithography. The scheme can be utilized with several imaging schemes known in the art, including extreme ultraviolet lithography and various next generation lithography schemes including imprint lithography, or directed self-assembly.
There are several imaging schemes known in the art for the purpose of achieving resolution increases with double exposure by the overall process shown in FIG. 1(b). Several of these schemes are outlined by Owe-Yang, D. C., et al., “Double exposure for the contact layer of the 65 nm node,” Proceedings of SPIE, Vol. 5753, p. 171, 2005. The first method outlined in this work is called an “isolation layer”. It is demonstrated in FIG. 3. In this case, a thin polymeric material is coated conformally over the photoresist image. The residual acid in the photoresist diffuses into this material, catalyzing a crosslinking reaction and forming a protective barrier. The second resist is then applied over the protective layer and imaged traditionally. However, the reference teaches that the isolation layers tested were not suitable due to interaction with the 193 nm photoresists. Furthermore, this scheme suffers from two other issues. Like many similar schemes in prior art, the second photoresist is required to planarize the first image as well as image over topography, and have exceptionally large depth of focus (DOF) to achieve a reasonable pattern. However, immersion lithography is following a trend of continual decreases in depth of focus as the numerical aperture is increased (C. A. Mack, “Exploring the capabilities of immersion lithography through simulation”. Proc SPIE 5377, p. 428 (2004)). Imaging methods that require significant topography, and thus significant DOF, are not ideal for semiconductor manufacturing.
A second scheme known in the art is “resist hardening” (Owe-Yang supra; Nakamura et al. “Contact Hole Formation by Multiple Exposure Technique in Ultra-low k1 Lithography,” Proceedings of SPIE, Vol. 5377, p. 255, 2004). This scheme is shown in FIG. 4. In the “resist hardening” process, the first resist image is cross linked after the first lithography step by means of a high temperature bake, a UV-cure, or a combination of both processes. Then, a second photoresist is coated over the first image, and patterned conventionally. Finally, an integrated etch step is performed to transfer the composite of both images. This scheme also has several drawbacks. First, the issue mentioned above of topography related DOF concerns in the second image are also present. Second, conventional 193 nm photoresist materials are not conducive to post develop cross linking by the methods taught in the art. An examination of seven common, high performance 193 nm photoresists yielded only one resist that could be cross linked by these methods. Third, typical lithography coating tracks are not equipped to handle a UV cure process. This type of process would require a new tool set (in place of the traditional RIE) so the overall throughput gain is negligible. Finally, the process of crosslinking the first image may result in loss of critical dimension (CD) control.
A third scheme known in the art utilizes photoresists spun-cast from a different type of casting solvent, as shown in FIG. 5. Most often, alcohol soluble photoresists are discussed. (Owe-Yang, supra) In this scheme, the first image is printed conventionally, with a photoresist cast from an organic solvent. Then a second photoresist is applied. However, this new photoresist must be soluble in an alcohol casting solvent, or a casting solvent that is compatible with the first photoresist image. There are three challenges with this technique. First, the topography/DOF issue highlighted above is present. Second, it is difficult with present day photoresists to achieve high performance imaging with photoresist materials that are soluble in new casting solvents. There are a limited number of photoresist materials available. Third, if the second photoresist layer is alcohol soluble, this negates the use of an alcohol soluble immersion top coat material and high resolution imaging is not possible with standard immersion lithography techniques.
A fourth scheme know in the art utilizes spun-cast layers from two immiscible solvent systems as shown in FIG. 6. Here we limit it to the case of a two layer dual damascene structure. Most often an alcohol soluble resist is cast on the top of a first resist. Each resist receives a post-application bake. We refer to this as post apply processing typically comprising baking the film after application at temperatures generally in the range of 150 C-250 C to elicit a solubility switching reaction or a crosslinking reaction.
The multilayer stack is then subject to either two binary exposures or a single ternary exposure to generate an aerial image that mimics the dual damascene structure once the exposure resist is developed. The challenge here is that the depth of focus is not sufficient for low-k1 imaging. Additionally, the irradiation is integrated by the resist whether it is a single or double exposure. Therefore the developed images of the first and second resist are coupled.